#ifndef _REG52_H
#define _REG52_H

sfr P1    = 0x90;
sfr P1M0  = 0x91;
sfr P1M1  = 0x92;

sfr P2    = 0xA0;
sfr P2M0  = 0x95;
sfr P2M1  = 0x96;

sfr P3    = 0xB0;

sfr PSW   = 0xD0;
sfr ACC   = 0xE0;
sfr B     = 0xF0;
sfr SP    = 0x81;
sfr DPL   = 0x82;
sfr DPH   = 0x83;
sfr PCON  = 0x87;
sfr TCON  = 0x88;
sfr TMOD  = 0x89;
sfr TL0   = 0x8A;
sfr TL1   = 0x8B;
sfr TH0   = 0x8C;
sfr TH1   = 0x8D;
sfr AUXR = 0x8E;
sfr IE    = 0xA8;
sfr IP    = 0xB8;
sfr SCON  = 0x98;
sfr SBUF  = 0x99;
sfr ISP_CONTR = 0xE7;

//---PCA-------
sfr CCON = 0xD8;
sfr CMOD = 0xD9;
sfr CCAPM0 = 0xDA;
sfr CCAPM1 = 0xDB;
sfr CL = 0xE9;
sfr CH = 0xF9;
sfr CCAP0L = 0xEA;
sfr CCAP0H = 0xFA;

sfr P3M0 = 0xB1;
sfr P3M1 = 0xB2;

/*  BIT Registers  */
/*  PSW  */
sbit CY    = PSW^7;
sbit AC    = PSW^6;
sbit F0    = PSW^5;
sbit RS1   = PSW^4;
sbit RS0   = PSW^3;
sbit OV    = PSW^2;
sbit P     = PSW^0; //8052 only


/*  TCON  */
sbit TF1   = TCON^7;
sbit TR1   = TCON^6;
sbit TF0   = TCON^5;
sbit TR0   = TCON^4;
sbit IE1   = TCON^3;
sbit IT1   = TCON^2;
sbit IE0   = TCON^1;
sbit IT0   = TCON^0;

/*  IE  */
sbit EA    = IE^7;
sbit EPCA_LVD = IE^6;
sbit ET2   = IE^5; //8052 only
sbit ES    = IE^4;
sbit ET1   = IE^3;
sbit EX1   = IE^2;
sbit ET0   = IE^1;
sbit EX0   = IE^0;

/*  IP  */
sbit PT2   = IP^5;
sbit PS    = IP^4;
sbit PT1   = IP^3;
sbit PX1   = IP^2;
sbit PT0   = IP^1;
sbit PX0   = IP^0;

/*  P3  */
sbit RD    = P3^7;
sbit WR    = P3^6;
sbit T1    = P3^5;
sbit T0    = P3^4;
sbit INT1  = P3^3;
sbit INT0  = P3^2;
sbit TXD   = P3^1;
sbit RXD   = P3^0;

/*  SCON  */
sbit SM0   = SCON^7;
sbit SM1   = SCON^6;
sbit SM2   = SCON^5;
sbit REN   = SCON^4;
sbit TB8   = SCON^3;
sbit RB8   = SCON^2;
sbit TI    = SCON^1;
sbit RI    = SCON^0;

/*  P1  */
sbit T2EX  = P1^1; // 8052 only
sbit T2    = P1^0; // 8052 only
             

/*PCA*/
sbit	CF = CCON^7;
sbit 	CR = CCON^6;
sbit	CCF1 = CCON^1;
sbit 	CCF0 = CCON^0;

/*
sbit CIDL = CMOD^7;
sbit CPS1 = CMOD^2;
sbit CPS0 = CMOD^1;
sbit ECF = CMOD^0;


sbit ECOM0 = CCAPM0^6;
sbit CAPP0 = CCAPM0^5;
sbit CAPN0 = CCAPM0^4;
sbit MAT0 = CCAPM0^3;
sbit TOG0 = CCAPM0^2;
sbit PWM0 = CCAPM0^1;
sbit ECCF0 = CCAPM0^0;

sbit ECOM1 = CCAPM1^6;
sbit CAPP1 = CCAPM1^5;
sbit CAPN1 = CCAPM1^4;
sbit MAT1 = CCAPM1^3;
sbit TOG1 = CCAPM1^2;
sbit PWM1 = CCAPM1^1;
sbit ECCF1 = CCAPM1^0;
*/


sbit P1_0	= P1^0;
sbit P1_1	= P1^1;
sbit P1_2	= P1^2;
sbit P1_3	= P1^3;
sbit P1_4	= P1^4;
sbit P1_5	= P1^5;
sbit P1_6	= P1^6;
sbit P1_7	= P1^7;

sbit P3_0	= P3^0;
sbit P3_1	= P3^1;
sbit P3_2	= P3^2;
sbit P3_3	= P3^3;
sbit P3_4	= P3^4;
sbit P3_5	= P3^5;
sbit P3_6	= P3^6;
sbit P3_7	= P3^7;

/*
sbit P3M0_0	= P3M0^0;
sbit P3M0_1	= P3M0^1;
sbit P3M0_2	= P3M0^2;
sbit P3M0_3	= P3M0^3;
sbit P3M0_4	= P3M0^4;

sbit P3M0_6	= P3M0^6;
sbit P3M0_7	= P3M0^7;

sbit P3M1_0	= P3M1^0;
sbit P3M1_1	= P3M1^1;
sbit P3M1_2	= P3M1^2;
sbit P3M1_3	= P3M1^3;
sbit P3M1_4	= P3M1^4;

sbit P3M1_6	= P3M1^6;
sbit P3M1_7	= P3M1^7;
*/



// For Winbond MCU
//sfr CHPENR = 0xF6;//for Winbond Mcu to the Isp mode
//sfr CHPCON = 0xBF;//for Winbond Mcu to the Isp mode

#endif

